All papers
| A Case for a Coordinated Internet Video Control Plane Hui Zhang, Ion Stoica, Vyas Sekar, Junchen Jiang, Henry Milner, Florin Dobrian, Xi Liu |
| Why Systolic Architectures? Kung |
| Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Memory Controllers Mutlu and Moscibroda |
| Thread Cluster Memory Scheduling Kim et al. |
| Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems Ebrahimi et al. |
| Bartendr: A Practical Approach to Energy-aware Cellular Data Scheduling Kamal Jain, Calvin Grunewald, Prahlad Deshpande, Neil Spring, Ramachandran Ramjee, Vishnu Navda, Aaron Schulman |
| Reducing Memory Interference in Multicore Systems via Application-Aware Memory Channel Partitioning Muralidhara et al. |
| Only 365 days left until the Sigcomm deadline Jon Crowcroft, Christian Kreibich |
| Onix: A Distributed Control Platform for Large-scale Production Networks. ... , Teemu Koponen |
| How To Read a Paper S Keshav |