All papers
| A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories Mark S. Papamarcos, Janak H. Patel |
| Cohesion: A Hybrid Memory Model for Accelerators John H. Kelm, Daniel R. Johnson, William Touhy, Steven S. Lumetta, Sanjay J. Patel |
| Data Marshaling for Multi-core Architectures M. Aater Suleman, Onur Mutlu, Jose A. Joao, Khubaib , Yale N. Patt |
| A Policy Framework for the Future Internet Scott Shenker, Arun Seehra, Jad Nous, Michael Walfish, David Mazieres, Antonio Nicolosi |
| Tussle in Cyberspace: Defining Tomorrow’s Internet David Clark, Karen Sollins, John Wroclawski, Robert Braden |
| The Direct Access File System Matt DeBergalis, Peter F. Corbett, Steven Kleiman, Arthur Lent, Dave Noveck, Thomas Talpey, Mark Wittle |
| Chip Multithreading: Opportunities and Challenges Lawrence Spracklen, Santosh G. Abraham |
| Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor Rebecca L. Stamm, Dean M. Tullsen, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo |
| Speculative Lock Elision: Enabling Highly Concurrent Multithreaded Execution Ravi Rajwar, James R. Goodman |
| Transactional Memory: Architectural Support for Lock-Free Data Structures Maurice Herlihy, J. Eliot B. Moss |