Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
Thomas Moscibroda, Onur Mutlu
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MISE: Providing Performance Predictability and Improving Fairness in Shared Main Memory Systems
Onur Mutlu, Ben Jaiyen, Yoongu Kim, Vivek Seshadri, Lavanya Subramanian
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Aérgia: Exploiting Packet Latency Slack in On-Chip Networks
Chita R Das, Thomas Moscibroda, Onur Mutlu, Reetuparna Das
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Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems
Yale N Patt, Onur Mutlu, Chang Joo Lee, Eiman Ebrahimi
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A Case for Bufferless Routing in On-Chip Networks
Onur Mutlu, Thomas Moscibroda
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CHIPPER: A Low-Complexity Bufferless Deflection Router
Onur Mutlu, Chris Craik, Chris Fallin
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NVIDIA Tesla: A Unified Graphics and Computing Architecture
John Montrym, Stuart Oberman, John Nickolls, Erik Lindholm
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A closer look at GPUs
Mike Houston, Kayvon Fatahalian
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Improving GPU performance via large warps and two-level warp scheduling
Yale N Patt, Onur Mutlu, Rustam Miftakhutdinov, Chang Joo Lee, Michael Shebanow, Veynu Narasiman
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A preliminary architecture for a basic data flow processor
David Glasco, Michael Garland, Brucek Khailany, William J Dally, Stephen W Keckler
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