The Superblock: An Effective Technique for VLIW and Superscalar Compilation
Roland G Ouellette, Roger A Bringmann, Nancy J Warter, Pohua P Chang, William Y Chen, Scott A Mahlke, Wen-mei W Hwu
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Location Recognition using Prioritized Feature Matching
Dan Huttenlocher, Noah Snavely, Yunpeng Li
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Complexity-Effective Superscalar Processors
Subbarao Palacharla, Norman P. Jouppi, J. E. Smith
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Combining Branch Predictors
Scott McFarling
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X-ray: Automating Root-Cause Diagnosis of Performance Anomalies in Production Software
Jason Flinn, Michael Chow, Mona Attariyan
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Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-order Processors
Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt
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Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery
David N. Armstrong, Hyesoon Kim, Onur Mutlu, Yale N. Patt
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Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns
Onur Mutlu, Hyesoon Kim, Yale N. Patt
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Onur Mutlu, Hyesoon Kim, and Yale N. Patt, "Efficient Runahead Execution: Power-Efficient Memory Latency Tolerance," IEEE Micro Top Picks 2006.
anonymous author
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An intellectual history of programmable networks
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