All papers
Cramming more components onto integrated circuits Gordon E. Moore |
Instruction Sets and Beyond: Computers, Complexity, and Controversy Robert P Colwell, Charles Y Hitchcock III, E Douglas Jensen, H M Brinkley Sprunt, Charles P Kollar |
Preemptive Virtual Clock: A Flexible, Efficient, and Cost-effective QOS Scheme for Networks-on-a-Chip Boris Grot, Stephen W Keckler, Onur Mutlu |
The Microarchitecture of Superscalar Processors James E Smith, Gurindar S Sohi |
On pipelining dynamic instruction scheduling logic Jared Stark, Mark D Brown, Yale N Patt |
[talk] TRILL: Soul of a New Protocol Radia Perlman |
[talk] Exploiting WLAN Deployment Density: Fair WLAN Backhaul Aggregation Alberto Toledo |
[talk] ANTIDOTE: Understanding and Defending against the Poisoning of Anomaly Detectors Nina Taft |
[talk] M-Lab: open platform, open tools and open data for an open Internet Tiziana Refice |
Code Transformations to Improve Memory Parallelism Vijay S Pai, Sarita Adve |