Memory Scaling: A Systems Architecture Perspective
by Onur Mutlu
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| url: | http://www.ece.cmu.edu/~ece740/f13/lib/exe/fetch.php?media=memory-scaling_memcon13.pdf | | abstract: | The memory system is a fundamental performance
and energy bottleneck in almost all computing systems. Recent
system design, application, and technology trends that require
more capacity, bandwidth, efficiency, and predictability out of
the memory system make it an even more important system
bottleneck. At the same time, DRAM technology is experiencing
difficult technology scaling challenges that make the maintenance
and enhancement of its capacity, energy-efficiency, and reliability
significantly more costly with conventional techniques.
In this paper, after describing the demands and challenges
faced by the memory system, we examine some promising
research and design directions to overcome challenges posed
by memory scaling. Specifically, we survey three key solution
directions: 1) enabling new DRAM architectures, functions,
interfaces, and better integration of the DRAM and the rest of
the system, 2) designing a memory system that employs emerging
memory technologies and takes advantage of multiple different
technologies, 3) providing predictable performance and QoS to
applications sharing the memory system. We also briefly describe
our ongoing related work in combating scaling challenges of
NAND flash memory. |
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