The microarchitecture of superscalar processors
by James E. Smith, Gurindar S. Sohi
show details
Details
annote: | James E. Smith (Department of Electrical and Computer Engineering; 1415 Johnson Drive; Madison , WI 53706); Gurindar S. Sohi (Computer Sciences Department; 1210 W. Dayton; Madison , WI 53706); | abstract: | Superscalar processing is the latest in a long series of innovations aimed at producing ever-faster microprocessors. By exploiting instruction-level parallelism, superscalar processors are capable of executing more than one instruction in a clock cycle. This paper discusses the microarchitecture of superscalar processors. We begin with a discussion of the general problem solved by superscalar processors: converting an ostensibly sequential program into a more parallel one. The principles underlying this process | type: | misc | year: | 1995 | month: | oct # "~22 |
|
|
You need to log in to add tags and post comments.